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Many studies have been developed aiming to improve digital filters realizations, recurring to intricate structures and analyzing probabilistically the error's behavior. The work presented in this paper analyzes the feasibility of fixed-point implementation of classical infinite impulse response notch filters: Butterworth, Chebyshev I and II, and elliptic. To scrutinize the deformations suffered for distinct design specifications, it is assessed: the effect of the quality factor and normalized cut-off frequency, in the number of significant bits necessary to represent the filter's coefficients. The implications brought to FPGA implementation are also verified. The work focuses especially on the implementation of power line notch filters used to improve the signal-to-noise ratio in biomedical signals. The results obtained, when quantizing the digital notch filters, show that by applying second-order sections decomposition, low-order digital filters may be designed using only part of double precision capabilities. High-order notch filters with harsh design constraints are implementable using double precision, but only in second-order sections. Thus, it is revealed that to optimize computation time in real-time applications, an optimal digital notch filter implementation platform should have variable arithmetic precision. Considering these implementation constraints, utmost operation performance is finally estimated when implementing digital notch filters in Xilinx Virtex-5 field-programmable gate arrays. The influence of several design specifications, e.g. type, and order, in the filter's behavior was evaluated, namely in regard to order, type, input and coefficient number of bits, quality factor and cut-off frequency. Finally the implications and potential applications of such results are discussed.
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