Title

Performance analysis of RISC-V based cores in a dual-core programmable logic controller

Journal title

Bulletin of the Polish Academy of Sciences Technical Sciences

Yearbook

2026

Volume

74

Issue

4

Authors

Jekot, Bartłomiej ; Korzuch, Blazej ; Oles, Fabian ; Lempa, Paweł ; Strajer, Oskar ; Przechowski, Rafał ; Czerwiński, Robert ; Chmiel, Mirosław

Affiliation

Jekot, Bartłomiej : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Korzuch, Blazej : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Oles, Fabian : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Lempa, Paweł : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Strajer, Oskar : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Przechowski, Rafał : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Czerwiński, Robert : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland ; Chmiel, Mirosław : Silesian University of Technology, Department of Digital Systems, Akademicka 16, 44-100 Gliwice, Poland

Keywords

Programmable Logic Controllers (PLC) ; Field Programmable Gate Arrays (FPGA) ; Central Processing Units (CPU) ; bit.WORD unit ; RISC-V

Divisions of PAS

Nauki Techniczne

Coverage

e158308

Date

28.04.2026

Type

article

Identifier

DOI: 10.24425/bpasts.2026.158308